Automatic blending control system

ABSTRACT

A system for automatically adjusting the percentage or quantity of a given stream (which is being blended with other streams to form a blended product such as gasoline) in accordance with variations in the output of an analyzer associated with that stream. The analyzer measures a particular property of the blended stream. Alarms are activated when the stream or component percentage reaches certain predetermined limits during its automatic adjustment, and the component percentage adjustment is inhibited from going beyond these limits.

United States Patent 1191 [111 5,751,644 Mayer Aug. 7, 11973 [54]AUTOMATIC BLENDING CONTROL 3,272,217 9/1966 Young 137/486 x SYSTEM3,219,046 11/1965 Waugh 137/101.19 x 3,259,141 7/1966 Brendon...l37/624.1l X Inventor: Rcbcrl y Ardmorc, Pa. 3,342,199 9/1967 McEvoy137/88 Assigneez S 0 p y of Pennsylvania 3,590,227 6/1971 Porter et al235/151.l2

Philadelphia, Pa. 1 Primary Examiner-Joseph F. Ruggiero [22] Filed: Feb.22, 1972 Attorney-George L. Church, Donald R. Johnson et a1. [21] Appl.No; 227,749

, [57] ABSTRACT [52] us. Cl 235/151 12, 137/88, 235/92 FL A system forautomatically adjusting the percentage or 235/151 34 quantity ofa givenstream (which is being blended with 51 1m. (:1. 605d 11/02, 006 7/57other streams to form a blended product such as gaS [58] Field 61 Search235/151.12, 151.1, line) i accordance i iations in the ou put of an235/1501 15134 92 CP 92 PD 92 FL 92 analyzer associated with thatstream. The analyzer CA; 208/DIG. 1; 23/253 A, 254 E, 255 E, 232measures a particular property of the blended stream. 5; 137 3 43 437592 10mg 00 Alarms are activated when the stream or component 624.11,624.12, 624,21 percentage reaches certain predetermined limits duringits automatic adjustment, and the component percent- [56] Referen e Ci dage adjustment is inhibited from going beyond these UNITED STATESPATENTS 3,385,680 5/1968 Feld et a1 137/88 X 8 Claims, 8 Drawing FiguresOTHER BLEND ING COMPONENTS BLENDED //7 /8 /4 LlQ. ST'R. RVP 0R (A T? WBLE DED L Q. 1 7* AN ALY 215. R M

PU LS E GENERATOR .3 F LOW A B C METE R UN l T F DIFFERENTIAL CIRQHII 1.91

l BUTANE I i \VALVE OPERATOR Patented Aug. 7, 1973 7 Sheets-Sheet 2 920mon 9 0:22 09 $38 on? 55%; 0;. an 0; MW

III-l NOE Patented Aug. 7, 1973 7 Sheets-Sheet 3 '7 Sheets-Sheet 4 05 U0ll! Patented Aug. 7, 1973 2/12 OP 1 Q Patented Aug. 7, 1973 7Sheets-Sheet 6 Om Om ON ZOEL 2 02 3 0, an? op RWY NOE

06 100 Qa 20mm 1 1 AUTOMATIC BLENDING CONTROL SYSTEM This inventionrelates to an automatic control sys- 'tem, and more particularly to asystem for automatically adjusting the percentage of a given stream(referred to the total blended stream, of which the given stream forms ablending component) or quantity of a given stream (in the total blendedstream), in accordance with variations in the output of an analyzerassociated with such given stream.

The invention has particular utility in connection with the automaticblending, in a petroleum refinery, of liquid fuels (gasolines), and itwill therefore be described in this environment, by way of example. However, it is also applicable to systems for the blending of othermaterials.

In the blending of gasolines, two liquid components of the blendedstream are of particular interest, and a distinct property of theblended stream (which may be measured by an automatic analyzer fed bythe blended stream) is affected by the quantity of each of theserespective components in the blended stream. To particularize, one ofthese components is butane; the quantity of butane in the blended streamaffects the socalled Reid vapor pressure of the blended stream orproduct. The other of these components is a leadcontainingoctane-improver compound (referred to herein for convenience as simplylead"); the quantity of lead in the blended stream affects the octanenumber of the blended stream or product.

During any gasoline blending run, it is desired to maintain the Reidvapor pressure and the octane number of the blended stream substantiallyconstant, that is, at particular predetermined values. Therefore, thebroad or general purpose of the system of the present invention is tomaintain a property of a blended liquid stream substantially constant,this being done by automatically adjusting the percentage or quantity ofbutane, for example, in accordance with the output of a Reid vaporpressure analyzer fed by the blended stream, or by automaticallyadjusting the percentage or quantity of lead in accordance with theoutput of an octane analyzer fed by the blended stream.

An object of this invention is to provide a novel automatic controlsystem for use in blending operations.

Another object is to provide a novel blend control unit which willautomatically adjust the quantity of a given stream (blending component)in accordance with variations in the output of an analyzer associatedwith that stream.

A further object is to provide a novel blend control unit which willautomatically adjust the quantity of a given stream in such a way as tomaintain a property of the blended stream substantially constant.

A still further object is to provide a blend control unit which willautomatically adjust the quantity of a given stream in accordance withvariations in the output of an analyzer associated with that stream, butwhich will inhibit the quantity adjustment from going beyondpredetermined limits, and which will activate an alarm when any one ofthe limits has been reached.

A detailed description of the invention follows, taken in conjunctionwith the accompanying drawings, wherein:

FIG. 1 is a simplified block diagram of a blending system utilizing thisinvention;

FIG. 2 is a simplified circuit schematic of a timing pulse and up/downcontrol subassembly;

FIG. 3 is a simplified circuit schematic of an auto percent drivesubassembly;

FIG. 4 is a simplified circuit schematic of an auto percent resetsubassembly;

FIG. 5 is a simplified circuit schematic of an arrangement of indicatortubes and a pulse summing subassemy;

FIG. 6 is a simplified circuit schematic of a zero detector subassembly;

FIG. 7 is a simplified circuit schematic of a limit circuit board; and

FIG. 8 is a simplified circuit schematic of a maximum percentage alarmsubassembly.

Refer first to FIG. 1. A pulse generator 1, operating for example atabout pulses per second, provides the master control for the blendingsystem as a whole. Pulse generator 1 utilizes solid-state circuitry, andgenerally comprises a basic oscillator connected with gates and BCD(Binary Coded Digit) counters to provide gated output pulses in binarycoded form at its output terminals. For simplicity, only a single output2 is shown for the pulse generator in FIG. 1, although there areactually 12 outputterminals on this pulse generator. During some unittime interval, there would be provided on these output terminals: 1, 2,4, and 8 pulses respectively on four units terminals; 1, 2, 4, and 8pulses respectively on four tenths" terminals; and l,

2, 4, and 8 pulses respectively on four hundredths" terminals. The unitspulses would of course be decimally related to the tenths pulses and tothe hundredths pulses.

By appropriate selection, referred to a binary or base two countingscheme, any number of pulses, from zero through nine, can in effect beselected in each of the three groups (of four terminals each) referredto. This selection is made by an ABC (Automatic Blend Control) Unit ormodule, denoted generally by numeral 3, to which the output terminals ofpulse generator 1 are connected. The unit 3, comprising the heart of thepresent invention, will be described in detail hereinafter. Assume forthe moment that a selection has been made by unit 3; in this case, aselected number of pulses (derived from pulse generator I) is caused toappear on output lead 4 of unit 3, during each unit or basic timeinterval.

The unit 3 comprises a controller for a component of a blended liquidstream. For example, this may be either the butane or the lead componentof a gasoline stream being blended. In practice, one module or unit 3would be used as a controller for the butane component, and a separatebut closely duplicated unit 3 would be used as a controller for the leadcomponent. Assume first that the butane component is being controlled.The pulses appearing on output lead 4 (as determined by the ABC actionof unit 3) may be fed to one input of a differential circuit 5 in thevalve operator 6. The output of circuit 5 is used to drive abidirectional motor 7 in the valve operator. The output shaft 8 of motor7 (which shaft is illustrated schematically in FIG. l) is connectedthrough suitable gearing to the operating shaft (stem) of a valve 9which requires rotary motion for its operation and which is inserted inthe flow conduitl0 for the butane component. The motor 7, when it turnsin one direction, opens valve 9; when this motor turns in the oppositedirection, it closes valve 9. Valve 9 serves as a flow controllingdevice for the butane component.

In the same conduit as valve 9, but downstream from this valve, is aflowmeter 11 which senses the flow of fluid through conduit 10.Flowmeter 11 may be, for example, a turbine-type flowmeter, such as thatdisclosed in US. Pat. No. 3,136,159, June 9, 1964. Such a flowmetergenerates pulses, independently of any external power source, at a rateproportional to the fluid flow being metered; these pulses can bereadily ampli fied.

Pulses are produced by the metering device (flow sensing device) 11 at arate proportional to the fluid flow rate through conduit 10. Thesepulses appear at the output 12 of the flowmeter and are fed to the otheror second input of the differential circuit 5.

The differential circuit 5 compares the pulses fed to its two inputs. Ifthese two sets of pulses are coming into circuit 5 at the same rate,there will be no output from this circuit to motor 7, and this motorwill not rotate. Consequently, there will be no movement of valve 9. If,however, the rate of one set of pulses is faster than that of the other,there will be an output from circuit 5 to motor 7, the sense of thisoutput depending on which set of pulses has the faster rate. Motor 7will then rotate in one direction or the other, depending on the senseof the output from circuit 5. Valve 9 will then open or close, dependingon the direction of motor rotation.

If changes take place in unit 3 (in a manner to be described) such as toadjust or vary (either up or down) the number of pulses appearing onoutput lead 4, the change in the pulse rate applied to circuit 5 willresult in adjustment of the valve 9 to a new position, thereby to causethe pulse rate from meter 11 to match this varied pulse rate. The resultis that the flow rate of butane will be controlled by the pulsegenerator 1, acting through unit 3 and valve operator 6.

Summarizing the foregoing, the action of the system components so fardescribed causes the valve 9 to be brought to a position wherein thefluid flow rate through flowmeter I1 (and through the valve 9 andconduit 10) is such that the pulse rate from the meter 11 matchesexactly the pulse rate from the unit 3. At that time, the pulse ratesfrom 11 and 3 will be equal, and there will be no output from thedifferential circuit 5 to drive motor 7 so as to change the position ofvalve 9. At this position, then, the flow rate of the butane stream willbe exactly proportional to the pulse rate of pulse generator 1multiplied by the percentage rate established by unit 3.

The above action is somewhat similar to that described in US. Pat. No.3,249,115, May 3, 1966.

The conduit 10, carrying for example butane, and one or more otherconduits such as 14, carrying the other or remaining blendingcomponents, may be considered as coming together at a junction point ortee 15, which thus marks one end of a pipe or conduit 16 carrying theblended liquid stream (blend of butane plus all of the other liquidblending components).

According to this invention, a specific property of the blended liquidstream (blended product) is measured, and in response to unpredictableor fortuitous variations in the magnitude of such property from apredetermined (desired) value or magnitude, the proportion of oneparticular liquid component (to wit, the component which mainly affectsthis specific property) is adjusted or varied automatically, to returnthe said specific property to its desired or proper value. For thebutane component being now described, the specific property would be theReid vapor pressure of the blended stream.

A Reid vapor pressure analyzer 17 is coupled into the blended-liquidline 16, to receive the blended stream and to measure the Reid vaporpressure of the blended liquid. Although in FIG. 1 it is indicated thatthe entire blended liquid stream passes through analyzer 17, in actualpractice it would be appropriate to supply only a sample of the blendedliquid stream to analyzer 17. In FIG. 1, the blended liquid stream isillustrated as exiting from the analyzer 17 by way of a conduit 18.

The vapor pressure analyzer 17 operates in a known manner to produce anoutput electrical signal representative of the value or magnitude of theReid vapor pressure of the blended gasoline stream in conduit 16, andthis output signal is fed to unit 3 by way of a connection 19.Connection or lead 19 supplies the analyzer input to unit 3, to whichfurther reference will be made hereinafter. Speaking generally, the ABCUnit 3 acts to automatically vary or adjust the number of pulsesaupplied to its output lead 4, as the analyzer input supplied at 19 tounit 3 varies (either upwardly or downwardly).

For the lead blending component, substantially exact duplicates ofelements 3-13 would be employed, the ABC Unit for the lead componentbeing fed from the same single, common pulse generator 1 used for thebutane unit 3. In fact, this common pulse generator is used forcontrolling all of the components of the blended gasoline stream, but inthe case of the remaining components (other than butane and lead) thepulses are fed to the respective valve operators through fixed (that is,manually settable) percentage switches, essentially in the mannerdescribed in US. Pat. No. 3,272,217, Sept. 13, 1966.

For the lead blending component, the specific property of the blendedstream to be measured would be the octane number; it is pointed out thatthe octane number of the blended stream is affected mainly by theproportion of lead in such stream. Thus, in the case of the lead streamor component, an octane analyzer would be used at 17, to receive theblended stream and to measure the octane number of the blended liquid.Such octane analyzer would then operate in a known manner to produce anoutput electrical signal representative of the value or magnitude of theoctane number ofthe blended gasoline stream. In the case of the leadstream, the ABC unit acts to automatically vary or adjust the number ofpulses supplied to its output lead, as the output of the octane analyzer(supplied as analyzer input to such unit) varies, either upwardly ordownwardly.

Refer now to FIG. 2, which is a schematic circuit diagram ofa circuitsubassembly (forming part of the ABC unit 3) termed a Timing Pulse andUp/Down control (TPUDC). This circuit subassembly is composed ofsolid-state devices (mostly in the form of integrated circuits) and isassembled and wired in the form of a printed circuit board. There are aplurality of these boards included in the unit 3; they will be referredto as the description proceeds.

The input signal to unit 3 from the analyzer 17 (FIG. 1) reaches theTPUDC Board by way of two leads which together comprise the connection19. This signal is a 4-20 milliampere electrical signal the actual valueof which, at any moment, is proportional to the magnitude of theproperty being measured by the analyzer (Reid vapor pressure, in thecase of the vapor pressure analyzer, or octane number, in the case ofthe octane analyzer). This analyzer input" signal is in effect convertedto a voltage signal and fed in parallel (over separate respectiveresistors) to a summing input terminal of an operational amplifier 21and to a summing input terminal 22 of an operational amplifier 23.

An analyzer set point voltage is also fed to these same amplifier inputterminals 20 and 22. When the ABC Unit 3 is being used to trim butane,this set point voltage is obtained from the movable contact 24 on apotentiometer 25 supplied from the d. c. power source. In this case, theanalyzer set point voltage may be adjusted by means of a knob providedon the front panel of the unit, the range of adjustment being 5-15 psi(Reid vapor pressure).

When the ABC Unit 3 is being used with the octane analyzer, thepotentiometer 25 is rendered ineffective (by internal connections, notshown), and the analyzer set point is automatically adjusted to 50percent, inasmuch as this setting corresponds to the target octane. Thatis to say, with the octane analyzer the analyzer set point voltage isfixed and is independent of any front panel adjustment.

A pair of offset potentiometers 26 and 27, whose movable contacts areconnected respectively to amplifier terminals 20 and 22, furnish offsetvoltages to these amplifiers to establish a dead zone" in the vicinityof the analyzer set point.

The amplifiers 21 and 23 each function as an onoff" Schmitt Trigger. Theamplifiers 21 and 23 in effect compare an analyzer output signal (onlead 19) with an analyzer set point voltage and, when the analyzersignal is beyond the dead zone," develop an output signal (from theTPUDC Board) which tells the percentage of the lead or butane componentto either increase or decrease.

The summing of the various voltages (namely analyzer output, analyzerset point, and offset) in effect takes place at terminal 20 foramplifier 21, and at terminal 22 for amplifier 23. When the analyzeroutput voltage is on the low side of the analyzer set point, beyond thedead zone (which would call for an increase or up" count in thecomponent percentage set point), an of or zero signal appears at theoutput of amplifier 21. This is inverted to an on" or one by a signalinverter 28, and again to an off or zero" at the output of a finalamplifier 29, this zero signal being transmitted to an Auto PercentDrive (APD) circuit board illustrated in FIG. 3.

When the analyzer output voltage is on the high side of the set point,beyond the dead zone (which would call fora decrease or down" count inthe component percentage set point), an on" or one" signal appears atthe output of amplifier 23. This is inverted to an "off" or zero signalby the final amplifier 30, this zero signal being likewise transmittedto the APD Board.

The TPUDC Board also includes a one-shot multivibrator 31, whichproduces pulses at the rate of one every 30 seconds, for example. Thesepulses are fed into a divider (a shift register) 32 having a pluralityof output leads 33 from which timing pulses may be selected at ratesfrom one pulse every 30 seconds to one pulse every 8 minutes. Thesetiming pulses are used to control the rate of variation or rate ofadjustment of the component percentage set point. Using these pulses,the component percentage set point will be stepped up or down (asrequired by the analyzer output signal) at a selected rate, from onceevery 30 seconds to once every 8 minutes. Or (in the case of the octaneanalyzer) external timing pulses supplied by this analyzer may beapplied to item 32, producing timing pulses at 33 which will cause thecomponent percentage set point to step or shift up or down (if required)at a rate in accordance with these external timing pulses. These timingpulses may be termed clock pulses (CP).

The pulses produced at 33 are fed through an OR gate 49 for summing toproduce the CP signals, which are fed out from the TPUDC Board to theAPD Board (FIG. 3).

The TPUDC Board also includes a null indicator or null meter 34 (forexample, a voltmeter) which is connected between the analyzer set pointcontact 24 and the commonly connected terminals 35 of amplifier 21 and36 of amplifier 23. The null indicator 34 thus indicates how far awayfrom the analyzer set point the analyzer value (output) is.

In addition, an up correcting light (not shown) is suitably connected tothe output of amplifier 29, and a down" correcting light (not shown) issuitably connected to the output of amplifier 30. The TPUDC Boardactivates these correcting lights selectively, depending on the relativesense and relative value of the analyzer set point and analyzerinformation.

Refer now to FIG. 3, which is a schematic circuit diagram of the APDcircuit board. The up signal (output of amplifier 29, FIG. 2) is fed byway of a diode 37 and a Zener diode 38 into and through a firstamplifier 39, and thence through a second amplifier 40. The output ofamplifier 40 is fed through another amplifier 41 to provide a CountDirection (CD) signal on output lead 42, which latter signal is fed tothe Auto Percent Reset (APR) circuit board of FIG. 4. This CD siganl,which is in effect derived from the up" signal previously mentioned, ison or one" (again, as hereinabove, referring to a binary scheme ofsignals) when the analyzer output voltage is on the low side of theanalyzer set point, beyond the dead zone, and is otherwise off or zero.

The down signal (output of amplifier 30, FIG. 2) is fed by way of adiode 43 and a Zener diode 44 into and through a first amplifier 45, andthence through a second amplifier 46. Signal output from amplifier 46 isfed to a NAND gate 47, along with signal output from amplifier 40. TheNAND gate 47 produces at its output 48 a zero when all the inputsthereto are ones, and a one when any of the inputs thereto is zero." Theoutput of gate 47 is a Count Inhibit (CT Inhibit) Signal, which is fedto the APR Board of FIG. 4. This CT Inhibit Signal is off" or zerothroughout the dead zone" around the analyzer set point, but is on orone" both above and below such dead zone.

In the APD Board of FIG. 3, the CP Signal from the vibrator 52 (to belater referred to). From the output of gate 51, the CP Signal (which maycomprise three pulses or one pulse, for example, depending on thevariation of the analyzer output voltage with respect to the analyzerset point, as will later be described) is passed through a signalinverter 53, and thence to the APR Board of FIG. 4, by way of a lead 70.

The APD Board includes a pair of operational amplifiers 197 and 198structurally quite similar to the amplifiers 21 and 23 of FIG. 2,previously described, and having their inputs connected essentially inparallel to those of amplifiers 21 and 23. The analyzer input" signal isfed over a resistor 199 to a summing input terminal of amplifier 197,and over a resistor 200 to a summing input terminal 22' of amplifier198. The analyzer set point voltage is fed over a resistor 201 to inputterminal 20, and over a resistor 202 to input terminal 22'. An offsetpotentiometer 203 has its movable contact connected over a resistor 204to amplifier terminal 20'. An offset potentiometer 205 has its movablecontact connected over a resistor 206 to amplifier terminal 22'. Thepotentiometers 203 and 205 furnish offset voltages to the amplifiers 197and 198, respectively, to establish a dead zone in the vicinity of theanalyzer set point.

The signal output of amplifier 197 goes through two stages 207 and 208of amplification to one input of a gating (combining) device 209. Thesignal output of amplifier 198 goes through a single stage 210 ofamplification to the other input of device 209. The combined output fromdevice 209 goes through a single stage 21 1 of amplification, to providean output signal on an output lead 212 connected to this last-mentionedamplification stage.

The summing of the various voltages (namely analyzer output, analyzerset point, and offset) at the inputs of the amplifiers 197 and 198, andthe combining of the amplifier outputs, causes the production on outputlead 212 of an on" or one signal when the analyzer output voltage iswithin a narrow band on either side of the analyzer set point, butbeyond the so-called dead zone"; an of or zero signal is produced onlead 212 when the analyzer output voltage is beyond the narrow band justmentioned, on either side of the analyzer set point, that is, when thereis a large variation of the analyzer output voltage with respect to theanalyzer set point.

The signal on output lead 212 is applied through a signal inverter 213to the P,," terminal of a shift register (integrated circuit) 214connected as a variable modulo or divide-by-N counter, and is applieddirectly to the P," terminal of this shift register. The number N isdetermined by the signal on output lead 212. With the setup illustrated,when the signal on output lead 212 is a "one," N is l, and when thesignal on output lead 212 is a zero," N is 3. Alternatively, anothercircuit (not shown) could be utilized to essentially provide a differentbias on the P," terminal of register 214 and on one input of device 213;if this latter circuit is used, N would be 2 when the signal on outputlead 212 is a one and would be 6 when the signal on output lead 212 is azero."

The input to the divide-by-N counter 214 is obtained from the gate 195through a signal inverter 215, and the output of this counter is appliedto the flip-flop 194, by way of a lead 216.

Each clock pulse CP derived from the TPUDC Board, and applied to theflip-flop circuit 194 by way of pulse shaper 50, causes the circuit 194to be placed in such a state as to provide an enabling voltage to theAND gate 195, and this AND gate will then pass pulses (derived fromoscillator 196) to the OR gate 51 and to the divider 214, the number ofpulses so passed to gate 51 (as a CP Signal for the APR Board, and alsofor the Limit Board) being determined by N of the divider 214 (whichproduces an output pulse for every N-input pulse), the output pulseproduced by this divider being utilized to reverse the state of circuit194 and thus to disable the AND gate 195. Thus, when the analyzer outputvoltage is within a narrow band on either side of the analyzer setpoint, but beyond the so-called dead zone (in which case N of divider214 is 1), one pulse (or two pulses, if the alternative circuitdescribed is utilized) is produced as a CP Signal for the APR Board inresponse to each CP Signal pulse received from the TPUDC Board; when theanalyzer output is beyond the aforementioned narrow band, on either sideof the analyzer set point (in which case N of divider 214 is 3), threepulses (or six pulses, if the alternative circuit" described isutilized) are produced as a CP Signal for the APR Board in response toeach CP Signal pulse received from the TPUDC Board.

The monostable multivibrator 52 is triggered to produce an output pulse(for resetting) whenever the ABC unit is put into operation on manual"control, or whenever resetting becomes appropriate (as, for example,when the power to the unit goes off and then comes back on). This outputpulse from integrated circuit 52 is fed through suitable couplingdevices (e.g., amplifiers) 72 and 73 to provide at 74 a PE (for ParallelEnable) Signal which is fed to the APR Board of FIG. 4, and is also fedthrough gate 51 to the various circuits which utilize the CP Signal.Summarizing, the APD Board of FIG. 3 converts the information from theTPUDC Board (FIG. 2) to the necessary logical information to feed theup/down decade counters 54-56 which are located in the APR Board (FIG.4). The APD Board also generates the necessary signals, in conjunctionwith the manual percent selector switches 58, 61, and 64 (FIG. 4) toreset the counters 5456 in the APR Board to the values indicated on suchpercent switches.

Refer now to FIG. 4. The APR Board includes three exactly similar MSI(Medium Scale Integration) up/- down decade counters which have the formof shift registers and which may be thought of as operating to countpulses applied thereto, counter 54 operating for units, counter 55 fortenths, and counter 56 for hundredths.

From the master pulse generator 1 (previously referred to in connectionwith FIG. 1), pulses in binary relation to each other (that is, as 1, 2,4, and 8) are fed by way of the four leads denoted by numeral 57 to theinput side of one section of a manually operable (thumbwheel type)percentage selector switch 58 for units, and the pulses selected byswitch 58 are utilized under Manual" operation conditions, as will bedescribed hereinafter. The switch 58 has another section which(selectively, as selected by this switch, and in binary fashion) groundthe four leads denoted by numberal 59 (which leads are connected betweenswitch 58 and four parallel terminals provided on counter 54), forpresetting the counter 54.

From the master pulse generator 1, pulses in binary relation to eachother, but in decimal relation to the pulses fed to selector switch 58,are fed by way of the four leads denoted by numeral 60 to the input sideof one section of a manually operable percentage selector switch 61(similar to switch 58) for tenths," and the pulses selected by switch 61are utilized under Manual operation conditions. The switch 61 hasanother section which (selectively, as selected by this switch, and inbinary fashion) grounds the four leads denoted by numeral 62 (whichleads are connected between switch 61 and four parallel terminalsprovided on counter 55), for presetting the counter 55.

From the master pulse generator 1, pulses in binary relation to eachother, but in decimal relation to the pulses fed to selector switch 61,are fed by way of the four leads denoted by numeral 63 to the input sideof one section of a manually operable percentage selector switch 64(similar to switch 58) for hundredths, and the pulses selected by switch64 are utilized under Manual operation conditions. The switch 64 hasanother section which (selectively, as selected by this switch, and inbinary fashion) grounds the four leads denoted by numeral 65 (whichleads are connected between switch 64 and four parallel terminalsprovided on counter 56), for presetting the counter 56.

Each of the counters 54-56 has a PE terminal, to all of which terminals(in parallel) is fed the PE signal pulse, obtained from the APD Board byway of lead 74.

'The PE terminals of the counters, and the lead 74, are

in effect used to transfer the count set up or established (for counterpresetting) by switches 58, 61, and 64 to the up/down decade counters54-56.,Thus, whenever a PE Signal pulse is applied at 74 to the counters(that is, when the ABC unit is initially put into operation, or wheneverresetting of the counters becomes necessary), counters 54-56 will haveput into them, as a count, the percent value indicated by the manualswitches 58, 61, and 64. In effect, then, the PE Signal pulse initiallygates the count established by switches 58, 61, and 64 into therespective counters 54, 55, and 56 as a count. During automaticoperation, however (as will later become apparent), the count incounters 54-56 may vary up or down from this initiallyestablished number(established in accordance with the settings of the manual selectorswitches 58, 61, and 64).

Each of the counters 54-56 is provided with a plurality of terminalswhich are connected in multiple (as denoted by numerals 66, 67, and 68for the counters 54, 55, and 56 respectively) to the CE (for controlenable) terminals of the respective counters. Signal voltages may beapplied to these terminals to inhibit the up/- down counting action ofthe counters, the arrangement being such that if any of these signalvoltages are (FIG. 3), and which is zero in the dead zone" To properlyorder the counters and transfer the tens counts, a lead extends from theTC (for Tens Carry) terminal of the lowest-order counter 56 to one ofthe multipled CE terminals 66 and 67, respectively, in each of the twohigher-order counters 54 and 55, and a lead 76 extends from the TCterminal of the intermediate counter 55 to one of the multipled CEterminals 66 in the highest-order counter 54. These leads 75 and 76provide for proper tens carry" action between the ordered counters.

Each of the counters 54-56 has a CP terminal, to all of which terminals(in parallel) is fed the CP signal obtained from the APD Board, by wayof a lead 70. Assuming that the counters 54-56 have been initially set(or reset) to the count indicated on the manual selector switches 58,61, and 64, then by adding (or subtracting) a clock pulse (CF) to thecounter inputs, such counters may be stepped up or down one count foreach clock pulse so added or subtracted. The foregoing assumes, ofcourse, that the counters are not inhibited by the CT Inhibit Signal, orinhibited in some other manner yet to be described. Thus, it may bestated that, in general, whenever the analyzer voltage is beyond thedead zone, on either side of the analyzer set point, the counters 54-56will step up or down one count for each clock pulse added or subtractedto the counter inputs.

The direction, up or down, in which the counters 54-56 so step isdetermined by the CD (Count direction) Signal obtained from the APDBoard. Each of the counters has a CD terminal, to all of which terminals(in parallel) is fed the CD.Signal obtained from the APD Board, by wayof lead 42. The arrangement is such that when the CD Signal is on orone, the counters 54-56 will count up; when this signal is off or zero,the counters will count down. Since (as previously described) the CDSignal voltage is on" when the analyzer voltage is beyond the dead zone,on the low side of the analyzer set point, and is otherwise off, itfollows that the counters 54-56 will count up when-the analyzer voltageis on the low side of the analyzer set point (and beyond the dead zone),and will count down when the analyzer voltage is on the high side of theanalyzer set point (and also beyond the dead zone).

The percentage count" initially established in the counters 54-56depends on the settings of the switches 58, 61, and 64, since it isthese switch settings which set up or establish (that is, preset) theinitial count into the counters. This initial count remains in thecounters thereafter, during automatic or analyzer operation, but issubject to being changed (by stepping up or down, as required by theanalyzer'output voltage, at a rate determined by the CP Signal pulses).

The signal outputs (in binary-coded digital form) of the up/downcounters 54-56 on the APR Board of FIG. 4 drive Nixie indicator tubes(see FIG. 5) which indicate the actual output of the up/down counters;they also activate the proper input gates of the PS (for Pulse Summing)Board, and send signals to the ZD (for Zero Detector) Board, to bedescribed later. The four output leads of counter 54 are denoted bynumeral 77; the four output leads of counter 55 are denoted by numeral78; the four output leads of counter 56 are denoted by numeral 79.

The ABC Unit is initially put into operation under manual controlconditions (wherein the component percentage set point is established inaccordance with the settings of the manual selector switches 58, 61, and64); following this, the unit is switched over to automatic or analyzercontrol. For manual" control, the pulse outputs selected in one sectionof the selector switches 58, 61, and 64 (the number of pulses in suchoutputs being determined by the settings of the switches) are combinedby means of a lead 80 and fed to the Man" (for manual) fixed contact 81ofa manual-analyzer switch 82 (FIG. The movable contact of switch 82 isconnected to the ABC Unit output lead 4 (FIG. 1). Thus, under manualcontrol conditions, switch 82 is on Man contact 81, and the output ofthe ABC Unit 3 (which is used to control the valve 9 in the mannerpreviously described) is uniquely determined by the settings of themanual selector switches 58, 61, and 64.

Refer now to FIG. 5. The signal output at 77 of the up/down counter 54is utilized to drive the electrodes of a BCD (for Binary-Coded Decimal)Nixie indicator tube in block 83, the tube in block 83 thus indicating(in decimal digit form) the units in the actual output of the counter 54(i.e., the actual count in this counter) during operation of the ABCUnit of the invention.

The signal output at 78 of the up/down counter 55 is utilized to drivethe electrodes of a similar BCD Nixie indicator tube in block 84, thetube in block 84 thus indicating (in decimal digit form) the tenths" inthe actual output of the counter 55 (i.e., the actual count" in thiscounter).

The signal output at 79 of the up/down counter 56 is utilized to drivethe electrodes of a similar BCD Nixie indicator tube in block 85, thetube in block 85 thus indicating (in decimal digit form) the hundredthsin the actual output of the counter 56 (i.e., the actual count" in thiscounter).

The four similar output leads 77 are also connected respectively each toa separate two-input gate" (integrated circuit) operating as an ANDgate, these four gates being denoted by reference numerals 86, 87, 88,and 89. The gates 86-89 form part of the PS Board proper. Binary-codedpulses from the units output terminals of the master pulse generator 1(in the set flow module) are also fed to the gates 86-89, the four leadsfrom the pulse generator being connected to the AND gate inputs throughrespective pulse inverter or signal inverter integrated circuits 90, 91,92, and 93. The outputs of the four AND gates 86-89 are combined on acommon bus 94 and fed to one input of a three-input gate (integratedcircuit) 95 operating as an OR gate. The commoned output of gate 95 isfed through a three-input gate (similar in construction to gate 95, butoperating as a simple signal inverter) 96, and the output of inverter 96goes to the An (for analyzer) fixed contact 97 of switch 82.

The pulses required to make up-the units" digit of the componentpercentage set point are gated (at 86-89) by the inputs (at 77) from theAPR Board. These pulses are then (assuming the switch 82 has been setfor automatic or analyzer" operation) sent to the stream module (forbutane, or lead) which the ABC Unit 3 (FIG. 1) is controlling, by way ofABC Unit output lead 4.

The four signal output leads 78 are also connected respectively each toa separate two-input gate similar to gates 86-89 and also operating asan AND gate,

these four gates being denoted by reference numerals 98, 99, 100, and101. Gates 98101 also form part of the PS Board. Binary-coded pulsesfrom the tenths" output terminals of the master pulse generator 1 arealso fed to the gates 98-101, the four leads from the pulse generatorbeing connected to the AND gate in-. puts through respective pulseinverter or signal inverter integrated circuits 102, 103, 104, and 105.The outputs of the four AND gates 98-101 are combined on a common bus106 and fed to a second input of the gate 95. Thus, the pulses requiredto make up the tenths digit of the component percentage set point aregated (at 98-101) by the inputs (at 78) from the APR Board.

The four signal output leads 79 are also connected respectively each toa separate two-input gate" similar to gates 86-89 and also operating asan AND gate, these four gates being denoted by reference numerals 107,108, 109, and 110. Gates 107-110 also form part of the PS Board.Binary-coded pulses from the hundredths output terminals of the masterpulse generator 1 are also fed to the gates 107-110, the four leads fromthe pulse generator being connected to the AND gate inputs throughrespective pulse inverter or signal inverter integrated circuits 111,112, 113, and 114. The outputs of the four AND gates 107-110 arecombined on a common bus and fed to a third input of the gate 95. Thus,the pulses required to make up the hundredths digit of the componentpercentage set point are gated (at 107-110) by the inputs (at 79) fromthe APR Board.

Summarizing, the train of pulses required to make up the componentpercentage set point is gated by the inputs (at 77-79) from the APRBoard; this train of pulses is then sent (under automatic or analyzer"operating conditions) to the stream module which the ABC Unit of theinvention is controlling (either butane or lead, for example).

As previously described, the count" in the counters 54-56, underautomatic or analyzer" operation, steps up or down in response to theanalyzer output voltage, and as required by the analyzer output voltage,as the latter varies to one side or the other (beyond the socalled deadzone) of the analyzer set point. This variation of the count" in thecounters changes (by means of the PS Board of FIG. 5) the componentpercentage set point, and this change is always in such a direction asto tend to maintain (by means of the stream control arrangement ofFIG. 1) the analyzer output voltage at or very close to the analyzer setpoint.

Essentially, the purpose of the ABC Unit described is to adjust thepercent or quantity of a given stream (butane or lead, for example) inaccordance with variations of an analyzer associated with that stream.The amount of lead blended into or injected into the final or blendedproduct is adjustable (by means of an adjustable component percentageset point), and is controlled by the output of the octane analyzer; theamount of butane blended into or injected into the final, blendedproduct is likewise adjustable (by means of an adjustable componentpercentage set point), and is controlled by the output of the Reid vaporpressure analyzer. This action has been previously described. Inasmuchas the component percentage set points can be stepped up or downautomatically, in accordance with analyzer information, it is necessaryto establish limits from which the ABC Unit is prohibited from stepping.According to this invention, four limits are established,

and at each of these four limits an alarm is sounded, so that theoperator will know that one of the limits has been reached.

The first of these limiting arrangements activates an alarm when thecomponent percentage set point is stepped down to zero, and the systemis inhibited from driving (automatically) below zero; however, if asignal is received to increase the percentage, the unit automaticallystarts stepping up, to increase the component percentage above zero.This will now be described.

Refer now to FIG. 6. The counter output units leads 77, in addition tobeing connected to the Nixie tube in block 83 and to gates 86-89, areconnected through separate respective signal inverters 1 16 to four ofthe eight inputs of an eight-input NAND gate 117 in the ZD Board of FIG.6. The counter output tenths leads 78, in addition to being connected tothe Nixie tube in block 84 and to gates 98-101, are connected throughseparate respective signal inverters 118 to two of the inputs of gate117 and to two of the eight inputs of an eight-input NAND gate 119 whichis similar to gate 117. The counter output hundredths leads 79, inaddition to being connected to the Nixie tube in block 85 and to gates107-110, are connected through separate respective signal inverters 120to four of the inputs of gate 119.

The output of gate 117 is fed through a signal inverter 121 to an outputlead 122, and the output of gate 119 is fed through a signal inverter123 to an output lead 124. The leads 122 and 124 are coupled as the twoinputs to an OR gate 125 (which operates as a signal inverter), theoutput 126 of which goes to a limit board (LB) schematically illustratedin FIG. 7.

The ZD Board of FIG. 6 receives its information from the APR Board ofFIG. 4 (the connections being shown through the PS Board of FIG. merelyfor convenience of illustration herein), andits output 126 is normallyfive volts (corresponding to an on signal). However, when the counters54-56 in the APR Board are all zeros (the count then being 0.00), theinputs 77-79 to the ZD Board are all zeros. Then, the outputs of theinverters 116, I18, and 120 (inputs to the NAND gates I17 and 119) willall be ones, resulting in zero outputs from the NAND gates 117 and 119.These zero" outputs will be inverted to "ones" on the leads I22 and 124,resulting in a zero output at 126 (which is the output of the ZD Board).

Refer now to FIG. 7, which is a schematic of the LB. The zero alarmsignal lead 126 is connected as one of the inputs to a two-input gate(OR gate) 127, providing a one or on signal (a down limit signal) at theoutput 128 of this gate under zero alarm" conditions. This .down limit"signal is applied as a one to a NAND gate 129 in the APD Board (FIG. 3),the other input to this gate being obtained from the output of amplifier40. When counting down (the counting being, of course, that of counters54-56 of FIG. 4), such as counting down to 0.00, the signal at theoutput of amplifier 40 has a value of one. Thus, when the count is 0.00and a down" count is called for, both signals applied to NAND gate 129are ones, resulting in a zero signal at the output 130 of gate 129.

The last-mentioned Up Limit CE" Signal (on output lead 130) is fed tothe APR Board of FIG. 4 and to the LB of FIG. 7. This signal, which is azero" when the count is 0.00 and a down count is being calld for, is fedto the CE terminals of all of the counters 54-56, at

66, 67, and 68; the result is to inhibit the counting action of thesecounters. Thus, the system is inhibited from changing the quantity inthe direction (down) which caused the limit (0.00) to be reached. On theother hand, when the count is 0.00 and an up count is being called for,there is a zero" at the output of amplifier 40, giving a one output at130. This one signal, applied to the CE terminals on the counters 54-56,does not produce any inhibiting action of these counters. Therefore,they are permitted to change the quantity in the direction (up) oppositeto the direction (down) which caused the 0.00 limit to be reached.

The zero alarm signal at 126 (which, as stated, has a zero value whenthe counters 54-56 are all zeros) is also fed as one of the Inputs to anactive pull-up buffer (integrated circuit) 131 operating as an NANDgate. This signal provides a one at the output 132 of gate 131, sinceunder the conditions mentioned a zero is applied to one of the inputs ofthis gate (normally all of the inputs to this gate are ones).

This zero alarm" signal is fed over a resistor 133 and a Zener diode 134to the base of a transistor 135 in an alarm system which is arranged toprovide an audible and visual alarm under certain alarm conditions. Fromthe collector of transistor 135, the signal (which, it will beremembered, is a one at 132 when the count in the counters of FIG. 4 is0.00) is fed over a resistor 136 and through a diode-resistorcombination 137, 138 to the base of a transistor 139. The collector ofthis latter transistor is connected through a diode 140 and thencethrough an alarm relay (not shown) to a negative voltage, for activatingan audible alarm, and through a diode 141 and thence through an alarmlamp (not shown) to a negative voltage, for providing avisual alarm. Thearrangement of the alarm system described is such that the alarm relayand alarm lamp will be activated whenever there is a one signal at 132;thus, an alarm will be given for a count of 0.00 in the counters 54-56.A circuit for operating a flasher extends from resistor 136 through atransistor 69 and a diode 71. A SCR 142 is used for silencing the alarm,by means of a silencer switch (not shown, but coupled to the collectorof this transistor).

The first of the limiting arrangements, just described, is applicable toboth butane and lead.

The second and third limiting arrangements, applicable only to the ABCunit for lead, activate an alarm when the quantity of lead is eitherplus or minus 0.5 gram from the preset value (corresponding to a countermovement of plus or minus 50 counts in the counters such as 54-56, fromtheir initial setting as established by the manual selector switches 58,61, and 64), and the system is inhibited from going beyond these twolimits. In the LB of FIG. 7, there are two up/down decade counters 143and 144, each of which is exactly similar in construction to thecounters 54-56 of FIG. 4. The counters 143 and 144 are supplied with aPE Signal from the APD Board of FIG. 3, by way of the lead 74 (just asare the counters 54-56), to establish an initial count therein. This PESignal goes to the appropriate terminals of counters 143 and 144.However, the counters 143 and 144 are supplied with fixed voltage inputsby way of leads 145 and 146 (instead of being supplied from the manualswitches 58, 61, and 64), such that any time the manual percent selectorswitches are moved from one value to another, the counters 143 and 144are automaticaliy reset to an initial count" of fifty (rather than to acount determined by the selector switches, as are the counters 54-56).

During automatic or analyzer" operation, the quantities or counts" inthe counters 143 and 144 are shifted simultaneously with those in theAPR Board counters 54-56.

The "Tens Carry arrangement 147 for the counters 143-144 is similar tothe arrangements 75 and 76 for counters 54-56, previously described. Themultipled CE Terminals of counter 143 are denoted by numeral 148, whilethe multipled CE Terminals of counter 144 are denoted by numeral 149.

The CP Signal (for counting up or down) is supplied to the appropriateterminals of counters 143 and 144 from the APD Board, by way of the lead70, The CD Signal (for establishing the direction of the count, up ordown) is supplied to the appropriate terminals of counters 143 and 144from the APD Board, by way of lead 42.

The "zero CT Inhibit Signal (for inhibiting counting within the deadzone") is supplied to CE Terminals of counters 143-144 from the APDBoard, by way of the lead 48.

The Up Limit CE Signal (which inhibits the counting action in thedirection which caused a zero count" to be reached by counters 54-56) issupplied to CE Terminals of counters 143 and 144 from the APD Board, byway of the lead 130.

The four binary-related output leads 150 of counter 143 are connectedthrough separate respective signal inverters 151 to a common bus 152.The four binaryrelated output leads 153 of counter 144 are connectedthrough separate respective signal inverters 154 to the bus 152. Tesignal on bus 152 is fed through a signal inverter 155, the output 156of this latter inverter being fed as another one of the inputs to theNAND gate 131.

It will be recalled that the counters 143 and 144 are automatically setto an initial count of 50, whenever the manual selector switches 58, 61,and 64 are set to some value. When these counters have moved down 50counts from their initial setting (corresponding to a decrease in thequantity of lead of 0.5 gram from the preset value, as preset by themanual switches 58, 61, and 64), the count in the counters 143-144 is00, giving zeros" on all the leads 150 and 153. This produces a one"signal at the output 132 of gate 131, which results in activating thealarm system in the same manner as described previously; thus, an alarmwill be given when the up/down counters 143 and 144 have moved down 50counts from their initial setting.

Under these conditions, there is a zero signal on the output lead 156;this signal is fed as the other of the two inputs to OR gate 127, toprovide a one Down Limit Signal at output 128 under these alarmconditions. This results in a zero" Up Limit CE Signal on lead 130, justas previously described for a count of 0.00 in counters 54-56 with adown count being called for; this Up Limit CE Signal is fed to counters54-56 in the APR Board and to counters 143-144 in the LB. This zero" UpLimit CE Signal inhibits the counting action in all of the counters inthe direction which caused a zero count" to be reached by counters143-144. When the count in counters 143-144 is 00 and an up" count isbeing called for, a one signal is provided at 130. This one signal doesnot produce any inhibiting action on the counters; therefore, all of thecounters are permitted to count in the direction (up) opposite to thedirection (down) which caused the 00 count to be reached in counters143-144.

The LB includes a NAND gate 157 similar to gate 131. The first andfourth output leads of counter 143, and the first and fourth outputleads 153 of counter 144, provide the four input leads for gate 157. Theoutput lead 158 of gate 157 comprises another one of the inputs to gate131. When the counters 143-144 have moved up 49 counts from theirinitial setting (corresponding to an increase in the quantity of lead of0.5 gram from the preset value), the count in the counters 143-144 is99, giving a one signal on all of the inputs to gate 157. This providesa zero at 158, producing a one signal at the output 132 of gate 131,resulting in activation of the alarm system; thus, an alarm will begiven when the up/down counters 133-134 have moved up 49 counts fromtheir initial setting.

The zero" signal at 158 (under the above conditions, that is, a 99"count in counters 43-44) is inverted through a signal inverter (OR gate)159, giving a one" signal, an Up Limit Signal, at the inverter output160. This Up Limit Signal is applied as a one" to a NAND gate 161 in theAPD Board (FIG. 3), the other input to this gate being obtained from theoutput of amplifier 46. When counting up, the signal at the output ofamplifier 46 has a value ofone. Thus, when the count in counters 143-144is 99 and an up count is called for, both signals applied to NAND gate161 are ones," resulting in a zero signal at the output 162 of gate 161.

The last-mentioned Down Limit CE Signal (on output lead 162) is fed tothe APR Board of FIG. 4 and to the LB of FIG. 7. This signal, which is azero when the count in counters 143-144 is 99 and an up" count is beingcalled for, is fed at 148 to the CE Terminal of counter 143 and at 149to the CE Terminal of counter 144, both of these counters being in theLB of FIG. 7; it is also fed at 66 to the CE Tenninal of counter 54, at67 to the .CE Terminal of counter 55, and at 68 to the CE Terminal ofcounter 56, these three lastmentioned counters being in the APR Board ofFIG. 4. Thus, all five of the up/down decade counters are inhibited fromchanging the count in the direction (up) which caused the count of 99"to be reached by counters 143-144. When the count in counters 143-144 is99 and a down" count is being called for, a one signal is provided at162 since the output of amplifier 46 (applied to the input of NAND gate161) is then a zero." This one signal does not produce any inhibitingaction on the counters; therefore, all of the counters are permitted tocount in the direction (down) opposite to the direction (up) whichcaused the 99" count to be reached in counters 143-144.

The fourth limiting arrangement, applicable to both butane and lead,activates the alarm at a preset maximum quantity (preset by means ofmanual switches behind the module, on the back board), and the unit isinhibited from going above this preset quantity, although it ispermitted to step down from this amount.

Refer now to FIG. 8, which is a simplified circuit schematic of aMaximum Percentage Alarm (MPA) Circuit Board. A set of three manual(thumbwheeltype) preset maximum limit" switches 164, I65, and 166,essentially similar to the units switch 58, the tenths" switch 61, andthe hundredths" switch 64, respectively, of FIG. 4, are provided, thesemaximum limit switches preferably being mounted behind the module, onthe back board. The switches 164-166 are supplied with input pulses fromthe master pulse generator 1 at 57, 60,'and 63, respectively, in thesame manner as are the switches 58, 61, and 64, previously described.The pulse outputs of the switches 164-166 (the number of pulses in suchoutputs being determined by the settings of the switches) are combinedby means of a lead 167 (analogous to .lead 80 of FIG. 4) and fed over adiode 168 and a Zener diode 169 to the base of a transistor 170 whichcomprises the active portion of a pulse shaping (pulse narrowing)circuit. The signal output (having the form of narrow pulses) is takenfrom the collector of transistor 170 and utilized as one of the inputsfor a NAND gate 171, and also as one of the inputs for a NAND gate 172.The other input to gate 171 is obtained from the positive potentialsource, and thus is always a one or high. The set point" pulse output ofgate 171 (the maximum set point being determined by the settings ofswitches 164-166) is fed as one input to a flip-flop circuit 173, and isalso fed directly to a gating device 174 which provides one input for anExclusive OR circuit 175,

and is fed through a signal inverter 176 to a second gating device 177which provides another input for the circuit 175.

Signal input for the MPA Circuit of FIG. 8 is obtained from the outputof the entire ABC Unit 3, which appears on output lead 4 (FIG. 1). Thepulses appearing on output lead 4 (as determined by the ABC action ofunit 3, described previously) may be thought of as a test signal," ascontrasted to theset point signal previously referred to, which latteris determined by the settings of switches 164-166. This so-called testsignal is fed over a diode 178 and a Zener diode 179 to the base of atransistor 180 which comprises the active portion of a pulse shaping(pulse narrowing) circuit. Narrow-pulse output is taken from thecollector of transistor 180 andutilized as the other input for NANDgate, 172, and also as one of the inputs for a NAND gate 181'. The gate172 .in effect combines the test signal pulses and the set point"pulses, providing at its output a continuous succession of pulses. Thisoutput is fed through a pair of cascaded one-shot multivibrators 182 and183, to produce very narrow, delayed pulses which are fed through asignal inverter 184 to one input of an AND gate 185.

The other input to gate 181 is obtained from the positive potentialsource, and thus is always a one or high. The test signal" pulse outputof gate 181 (i.e., the component percentage set point output of the ABCUnit) is fed as the other input to the flip-flop circuit 173, and isalso fed directly to the gating device 177, and is fed through a signalinverter 186 tothe gating device l74. The outputs of the gating devices174 and 1.77 provide inputs to the Exclusive OR" circuit 175, whosepurpose is to prevent input pulses which occur simultaneously fromproducing any output. There is no output from circuit 175 when there arepulses on both its inputs simultaneously, but there is an output fromthis circuit when there is a pulse on only one input.

The output of circuit 175 is fed through a signal inverter 187 to theother input of AND gate 185. The AND gate 185, fed with signals by thecircuitry previously described (including items 171, 172, 174-177,181-184, 186, and 187) provides at its output a train of clock pulses,one for each test signal pulse and one for each set point" pulse fed tothe MPA Board. These clock pulses are fed as shift clocks from theoutput of gate to two four-bit shift registers (integrated circuits) 188and 189, which are interconnected as illustrated to provide an eight-bitleft-right shift register. The register shifts left or right on eachshift clock, shift direction being determined by the output of theflip-flop circuit 173, which is fed as a left shift/right shift selectsignal to the PE terminals of the shift registers 188 and 189, by way ofa lead 190. The circuit 173 (fed .by the test signal" pulses and the setpoint pulses) provides signals to shift the registers 188-189 in onedirection for each test signal pulse, and in the opposite direction foreach set point pulse. Each element 188 and 189 shifts right when the PEis high and left when it is low. The shift registers are set up for leftshift data out, by means of an output lead 191 connected to shiftregister 188. Lead 191 goes to an element 192 which is one element of aflip-flop circuit; the other element of the flip-flop is denoted bynumeral 13. The flip-flop 192, 13, connected as illustrated, ensuresthat a full travel or' shift of the register 188-189 will be required togo into or out of the alarm state; thus, alternating of the pulses atthe input to the register will. not put the unit into and out of alarm.

When the number of pulses in the ABC Unit output (test signal in FIG. 8)reaches the preset maximum quantity (the maximum set point in FIG. 8,preset by means of the maximum limit switches 164-166), the left shiftin the register 188-189 is complete, giving a maximum alarm signal onlead 191 which has a zero value on lead 163. g

This maximum alarm signal, which has a zero value under maximum'alarmconditions, is fed by way of lead 163 as another oneof the inputs to theNAND gate 131 in the Limit Board (FIG. 7). This zero signal at 163produces a one" signal at the output 132 of gate 131, resulting inactivation ofthe alarm system; thus, an alarm will be given whenever theoutput (at lead 4) of the PS Board (FIG. 5) exceeds the preset maximum(as preset by the manual maximum limit switches 164-166).

This maximum alarm" signal (zero" under alarm conditions) is also fed toOR gate 159, to provide an up limit" signal of value one at output 160.This up limit" signal is applied to gate 161 in the APD Board, aspreviously described. When the output of the PS Board exceeds the presetmaximum, and an up count is called for, a zero signal appears at theoutput 162 of gate 161. This last-mentioned signal is fed as a DownLimit CE Signal to the APR Board of FIG. 4 and to the Limit Board ofFIG. 7. This signal, which is a zero when the PS Board output exceedsthe preset maximum, is fed to the CE terminals of counters 143 and 144in the Limit Board, and to the CE terminals of counters 54-56 in the APRBoard. Thus, all five of the up/downdecade counters are inhibited fromchanging the count in the direction (up) which caused the preset maximumto be reached by the PS Board. When the PS Board output is at the presetmaximum and a down count is being called for, a one signal is providedat 162, since the output of amplifier 46 is then a zero. This one"signal does not produce any inhibiting action on the counters;therefore, all of the counters are permitted to count in the direction(down) opposite to the direction (up) which caused the preset maximum tobe reached by the PS Board output.

It has previously been stated, in connection with FIG. 1, that the ABCUnit of the invention may be used to control the proportion of lead inthe blended stream, in order to affect the octane number of the blendedliquid (blended gasoline stream). However, certain other blendingcomponents (e.g., certain hydrocarbons used for gasoline) have an effecton the octane number of the blended stream. It is within the scope ofthis invention to control the octane number of the blended stream bymeans of the aforementioned other blending components." In order to dothis, the output of the ABC Unit 3 would be utilized to control theproportions of these other blending components in the blended stream,the change in the component percentages (effected by the operation ofthe ABC Unit) being made in the manner necessary to correct the octanenumber of the blended stream.

The invention claimed is:

1. In an automatic system adapted to maintain the magnitude of aproperty of a blended liquid stream substantially constant, suchproperty being affected by the percentage of one particular component inthe blended stream: the combination of means for initially establishingan approximate percentage set point for said one component, an analyzerreceptive of said blended stream for measuring a property thereof andfor producing an output proportional to the magnitude of such property,means responsive to the analyzer output for automatically adjusting thecomponent percentage set point, to thereby maintain said propertymagnitude substantially constant, means establishing a plurality ofpredetermined quantitative limits directly on said component percentageset point, and means automatically inhibiting further automaticadjustment of such set point in the direction which caused the limit tobe reached, once any of these limits on such set point has been reached.

2. Combination of claim 1, including also means for activating an alarmupon the reaching of any one of the said predetermined limits by saidcomponent percentage set point, as the same is automatically adjusted.

3. In an automatic system adapted to maintain the value of a specificproperty of a blended liquid stream substantially constant, suchspecific property being affected mainly by the percentage of oneparticular liquid component in the blended stream and said systemoperating in response to an applied percentage set point for said onecomponent: an arrangement for controlling the percentage set point forsaid one component comprising means for initially establishing anapproximate component percentage set point, an analyzer receptive ofsaid blended stream for measuring said specific property thereof and forproducing an output electrical signal representative of the value ofsaid specific property, means for comparing the analyzer output signalwith an analyzer set point voltage and for developing signals ofopposite senses in response to respective variations in oppositedirections of said analyzer output signal with respect to said analyzerset point voltage, nonmechanical means for utilizing signals developedby said last-named means for automatically varying the componentpercentage set point either upwardly or downwardly, as determined by thesense of said developed signals, means establishing a plurality ofpredetermined quantitative limits directly on said component percentageset point, and means automatically inhibiting further automaticvariation of such set point in the direction which caused the limit tobe reached, once any of these limits on such set point has been reached.

4. Arrangement of claim 3, including also means for activating an alarmupon the reaching of any one of the said predetermined limits by saidcomponent percentage set point, as the same is automatically varied.

5. Arrangement set forth in claim 1, wherein the means for utilizingincludes a plurality of gates arranged in a digital array and fed bypulses from a pulse generator, and means for supplying signals derivedfrom said developed signals, and representative of the same, as controlsignals to said gates, thereby to control the number of pulses passingthrough such gates.

6. Arrangement set forth in claim 3, wherein the lastmentioned meansinhibits variation of the component percentage set point downwardly fromzero.

7. Arrangement set forth in claim 3, wherein the lastmentioned meansinhibits variation of the component percentage set point upwardly abovea preset maximum.

8. Arrangement set forth in claim 3, wherein the lastmentioned meansinhibits variation of the component percentage set point beyond a presetlimit, in either direction.

1. In an automatic system adapted to maintain the magnitude of aproperty of a blended liquid stream substantially constant, suchproperty being affected by the percentage of one particular component inthe blended stream: the combination of means for initially establishingan approximate percentage set point for said one component, an analyzerreceptive of said blended stream for measuring a property thereof andfor producing an output proportional to the magnitude of such property,means responsive To the analyzer output for automatically adjusting thecomponent percentage set point, to thereby maintain said propertymagnitude substantially constant, means establishing a plurality ofpredetermined quantitative limits directly on said component percentageset point, and means automatically inhibiting further automaticadjustment of such set point in the direction which caused the limit tobe reached, once any of these limits on such set point has been reached.2. Combination of claim 1, including also means for activating an alarmupon the reaching of any one of the said predetermined limits by saidcomponent percentage set point, as the same is automatically adjusted.3. In an automatic system adapted to maintain the value of a specificproperty of a blended liquid stream substantially constant, suchspecific property being affected mainly by the percentage of oneparticular liquid component in the blended stream and said systemoperating in response to an applied percentage set point for said onecomponent: an arrangement for controlling the percentage set point forsaid one component comprising means for initially establishing anapproximate component percentage set point, an analyzer receptive ofsaid blended stream for measuring said specific property thereof and forproducing an output electrical signal representative of the value ofsaid specific property, means for comparing the analyzer output signalwith an analyzer set point voltage and for developing signals ofopposite senses in response to respective variations in oppositedirections of said analyzer output signal with respect to said analyzerset point voltage, non-mechanical means for utilizing signals developedby said last-named means for automatically varying the componentpercentage set point either upwardly or downwardly, as determined by thesense of said developed signals, means establishing a plurality ofpredetermined quantitative limits directly on said component percentageset point, and means automatically inhibiting further automaticvariation of such set point in the direction which caused the limit tobe reached, once any of these limits on such set point has been reached.4. Arrangement of claim 3, including also means for activating an alarmupon the reaching of any one of the said predetermined limits by saidcomponent percentage set point, as the same is automatically varied. 5.Arrangement set forth in claim 1, wherein the means for utilizingincludes a plurality of gates arranged in a digital array and fed bypulses from a pulse generator, and means for supplying signals derivedfrom said developed signals, and representative of the same, as controlsignals to said gates, thereby to control the number of pulses passingthrough such gates.
 6. Arrangement set forth in claim 3, wherein thelast-mentioned means inhibits variation of the component percentage setpoint downwardly from zero.
 7. Arrangement set forth in claim 3, whereinthe last-mentioned means inhibits variation of the component percentageset point upwardly above a preset maximum.
 8. Arrangement set forth inclaim 3, wherein the last-mentioned means inhibits variation of thecomponent percentage set point beyond a preset limit, in eitherdirection.